Roadmap

v1.0 spec implemented. Static shapes, dtypes, compile-time shape verification, the core type system, and tagged-union enums. Generics are a bounded slice (single type parameter, scalar, monomorphized); closures, first-class functions, and traits remain roadmap.

Core v1 conformance is defined and tested; see Conformance and Stability. Tagged-union enums with single- and multi-field i64 and f64payloads construct, match, and run — byte-identically across x86 and Arm CPU substrates on the deterministic integer path.

The foundational language specification with type system and core syntax.

Reverse-mode AD for all Core v1 ops: Add, Sub, Mul, Div, MatMul, Dot, Transpose, Sum, Mean, Reshape, Relu, Conv2d, and indexing/slicing operations.

Full gradient support for Core v1 operations including Conv2d.

MIND frontend processes programs in 2.80-17.10 µs (parse + typecheck + IR) on the v0.4.2 (RFC 0005) baseline, held byte-identical through the current v0.10.x line. Bit-level determinism verified (all runs matched across the test suite).

See Performance and Running Benchmarks for full details.

Python bindings, determinism verification, PyTorch comparison, and documentation complete.

Deterministic CPU backend via the MIND runtime interface (Phase-1 ops).

Production-ready CPU execution with optimized compilation.

GPU and accelerator backends ship in the commercial mind-runtime: CUDA (caching device allocator, TF32 Tensor Cores via cuBLASLt, float4-vectorized elementwise ops), ROCm, Metal, WebGPU, and WebNN. These dispatch paths are available today under a commercial license — they are not on the open-source roadmap. The open compiler ships the deterministic CPU backend; the runtime layer adds accelerator dispatch.

Accelerator dispatch is part of the commercial mind-runtime and available under license now. See Enterprise for details. What remains the roadmap differentiator is bit-identical determinism acrossthese substrates — see Deterministic Native GPU Codegen below.

CUDA, ROCm, Metal, WebGPU, and WebNN dispatch ship in the commercial mind-runtime today. The open differentiator on the roadmap is cross-substrate byte-identity (deterministic native GPU codegen), not the backends themselves.

A MIND-owned, vendor-native code-generation path (NVIDIA and AMD) that emits native GPU machine code directly and deterministically — byte-identical output for identical IR, carrying the same embedded evidence chain MIND produces on CPU and Arm. A per-architecture backend (one per compute capability), part of the commercial mind-runtime.

Targets NVIDIA Blackwell-class hardware — RTX Spark (Grace + Blackwell SoC), GB10 / GB300 superchips — the forthcoming Vera Rubin generation, and AMDRDNA / CDNA (MI300 / MI350, RDNA4), each as its own per-architecture target. The goal is for cross-substrate bit-identity and the signed evidence chain to extend to the GPU substrate — today they are verified on the x86/Arm CPU integer path only.

Determinism on accelerators: identical IR produces a byte-identical GPU artifact, per architecture. Research-stage in the commercial mind-runtime; hardware validation gated on device availability.

The open compiler ships the deterministic CPU backend. The commercial mind-runtime ships dispatch for the mainstream accelerator classes today — GPU (CUDA / ROCm / Metal / WebGPU / WebNN), TPU, and NPU. A longer research track extends IR lowering to specialty substrates: LPU, DPU, FPGA, ASIC, Cerebras, Taalas, Tenstorrent, SambaNova, Graphcore IPU, Intel Gaudi, and the topological-quantum frontier (Microsoft Majorana 2) — where MIND can target gate scheduling but bit-identical determinism is physically impossible (the outer boundary of the wedge: a quantum measurement is probabilistic by nature).

GPU — CUDA / ROCm / Metal / WebGPU / WebNN, available now under commercial license. TPU — Google systolic arrays via XLA HLO lowering (TPU v5e / v5p). NPU — on-device: Apple ANE, Qualcomm Hexagon, Intel NPU. LPU — Groq TSP, deterministic SRAM-resident streaming. DPU — NVIDIA BlueField-3 / AMD Pensando. FPGA — Xilinx Versal / Intel Agilex via HLS dataflow. ASIC — mind.asic.* dialect, XRM-SSD reference target. GPU / TPU / NPU dispatch ships in the commercial mind-runtime today; the specialty backends (LPU / DPU / FPGA / ASIC and beyond) are research-stage, with IR-lowering design in progress.

CPU backend shipped open-source. GPU (CUDA / ROCm / Metal / WebGPU / WebNN), TPU, and NPU dispatch ship in the commercial mind-runtime today. The specialty long-tail (LPU / DPU / FPGA / ASIC / Cerebras / Taalas / Tenstorrent / SambaNova / Graphcore / Gaudi) is research-stage. The open differentiator on the roadmap is cross-substrate byte-identity across all of them.

Forward-looking backend slot for monolithic-3D hybrid stacks that integrate silicon CMOS logic, back-end-of-line carbon-nanotube FETs, and RRAM compute-in-memory tiers. Tracks recent research fabrications of low-temperature back-end-of-line M3D processes. Implementation is gated on a foundry-grade process shipping beyond research-prototype scale.

IR tier mapping reserved: control-flow on Si CMOS, tensor/conv on CNFET, weight residency + analog matmul on RRAM CIM. Analog→digital evidence-chain boundary re-hashes RRAM-tier results so MIND governance attests the digital wrapper without trusting the analog substrate (mirrors the photonic pattern). Per-device RRAM drift calibration + per-tier sparing hooks against the cited 0.01% per-CNT-layer defect ceiling.

Tracking only — no implementation work scheduled until an M3D CNFET+RRAM process ships beyond research-prototype scale with a stable host interface. Backend slot reserved so MIND IR can lower to a tiered logic-CNFET-RRAM stack when foundry-grade silicon ships, rather than retrofitting reactively.

Package manager design specified in mind-spec: PubGrub CDCL resolver, content-addressed SHA-256 storage, sparse registry protocol, workspace support, and multi-version isolation. Implementation is in early stages.

The specification covers SLSA provenance attestations (Ed25519), SBOM generation (SPDX 3.0 + CycloneDX 1.5), OSV vulnerability scanning, and policy enforcement gates.

Design-complete specification; dependency resolution and registry workflows are not yet finalized.

Governance logic runtime with enum and struct types, if/else and while control flow, const declarations, u32 bitfields, and bitwise operators. Byte-level operations via Rust FFI.

MIND is now a verifiable behavior language — expressing evidence-chained decisions alongside tensor computation. See policy.mind design reference.

Full two-tier implementation complete: control flow and constants (Tier 1), algebraic data types with enum and struct (Tier 2). Byte slices via Rust FFI.

mindc now emits libraries, not just executables. Node::Export -> IRModule.exports lowering (0.2.6), Mind.toml [exports] honored end-to-end (0.2.7), --profile=<default|systems|embedded> CLI flag (0.2.8), bounds + strict validation on manifest exports (0.2.9), --emit-shared cdylib flag (0.2.11). [protection] action transforms remain on the 0.3.0 track.

Foundation for native inference paths in mind-nerve, MindLLM, and rfn-mind. 1.8–15.5 µs frontend baseline preserved — CI bench gate clears at +0.6&percnt; on mlp, all other suites improved.

D1/D3/D5 of RFC 0002 shipped as v0.2.6/v0.2.7/v0.2.8 with security hardening in v0.2.9; cdylib emit in v0.2.11. Each item shipped a dedicated sub-benchmark; CI gate enforces ±2% per size / ±1% mean against the headline numbers.

Three compile-target profiles selected via --profile=<default|systems|embedded>. default: full tensor stdlib + Q16.16 + heap (1.8-15.5 us frontend). systems: stripped tensor + Q16.16 + governance + heap (0.8-3 us). embedded: stripped tensor + no heap + Q16.16 + governance (0.4-1 us). Strict CLI validation in 0.2.9.

Same source code, three artifacts — live in v0.2.8. Cross-profile linker refusal (MIC binary header profile field) remains on the 0.3.0 track so a systems cdylib cannot be linked into a default binary. Spec in mind-spec v1.0.

Profile selection wired through codegen (0.2.8, shipped); MIC binary header profile field + cross-profile linker refusal pending in 0.3.0. Bench gate has per-profile criterion suites.

match expressions with EnumVariant / Literal / Ident / Wildcard patterns and block bodies. &expr / &mut expr reference-taking prefix expressions, positionally disambiguated from bitwise & with no backtracking. REAP expert pruning attribute on fn items (dead-expert DCE pass; non-MoE compiles see zero overhead). tensor<sparse[csr|csc|coo|bsr], dtype> first-class type surface; CSR is the only concrete storage layout in v1.

CI bench-gate re-baselined against the Phase 10.7 surface and matched fast-path. Compile-speed moat preserved — all suites within the +2% gate.

Phase 10.7 expression layer + MoE pruning attribute + sparse-tensor type surface. Module-level gating only; no statement-level cfg.

RFC 0005 ships the four pure-MIND collections + I/O on the seven __mind_* intrinsics: std/vec.mind (growable Vec, 8-byte stride, doubling growth), std/string.mind (Vec<u8>-shaped String with documented UTF-8 invariant), std/map.mind (insertion-ordered Map on parallel keys/vals arrays), std/io.mind (File handle + __mind_read/__mind_write POSIX-shaped intrinsics). Every operation bottoms out in i64 ABI; no built-in pointer type, no hidden allocator. "use std.foo" cross-module resolver wired with per-arg signature matching against the imported declaration. std/*.mind sources baked into the mindc binary via include_str! so "mind build" of a project that says "use std.vec" resolves with zero external file dependency. MIND_STDLIB_PATH env-var override lets regulated deployments fork the stdlib without rebuilding mindc.

Re-baselined CI bench gate against the RFC 0005 floor (small_matmul 2.80 µs / medium_mlp 6.55 µs / large_network 17.10 µs); threshold loosened from +5% to +7% to absorb GitHub-hosted-runner variance on microbenches. All RFC 0005 work lives behind std-surface + cross-module-importsfeature flags — default-build frontend pipeline byte-identical, the compile-speed moat held. 65+ gated tests now under cloud CI guard. Honest scope: these are bounded first-version collections — the map is insert-only, allocation is region-based, and slices remain stubbed; a full general-purpose Vec/String/HashMap surface is roadmap.

Five-tag landing: v0.4.0 (Phase 2 + Phase A use-import resolver), v0.4.1 (Phase B per-arg signature matching, return-type fidelity), v0.4.2 (Phase C stdlib bundled into the binary), v0.4.3 (Phase D₁ MIND_STDLIB_PATH env-var fork-without-recompile), v0.4.4 (Phase D₂a Named-struct parameter names preserved in arity/type error messages).

**Front-end bootstrap self-host fixed point ACHIEVED:** The pure-MIND compiler front-end (examples/mindc_mind/main.mind) reproduces its own bootstrap byte-identically: (a) the mic@1 IR-text bootstrap fixed point, (b) the mic@3 canonical-binary-IR flip, and (c) the native x86-64/ELF emit of the seeded module — verified by the keystone gate (7/7 byte-identical). The normative self-host path is the native ELF backend, deterministic by construction; MLIR is the downstream-interchange + exotic-chip-reach backend, demoted from the self-host path but not dropped. The 32-byte ir_trace_hash PT_NOTE is self-computed by the pure-MIND SHA-256. Honest scope: this closes self-hosting for the front-end/bootstrap path — the wider toolchain still builds on Rust infrastructure, and full-chain Rust-independence is an early-stage roadmap track (~15%).

Self-host = the credibility milestone any language must cross. v0.6.1 reached the front-end bootstrap fixed point; v0.10.0 closed the native-ELF fixed point for the front-end, including the self-computed trace-hash evidence anchor. The native ELF backend is determinism-by-construction — a pure function of the IR, no external lowering chain. MLIR remains as a downstream-interchange path for specialty targets. Precise phrasing: the bootstrap self-hosts — the full toolchain is not yet Rust-free. Pure-MIND seed code: examples/mindc_mind/.

Front-end: lexer, parser, type-checker, emit_ir — all PASS. mic@1 bootstrap fixed-point: PASS (v0.6.1). mic@3 flip: PASS. Native-ELF seeded-module emit: byte-identical (keystone 7/7). trace-hash PT_NOTE: self-computed. Remaining: the full toolchain still depends on Rust infrastructure — end-to-end Rust-independence is a roadmap track (~15% complete).

**The native dense-vector surface.** mind-blas is the small, deliberately scoped set of primitives any MIND program calls without depending on an external BLAS: `dot`, `matmul`, plus L1 / L∞ and Q16.16 variants. One surface targets multiple sub-backends — scalar, x86-SIMD and ARM-NEON ship today, with CUDA on the commercial roadmap and a photonic-projected Q16.16 path at research stage — so the cross-arch determinism story holds end-to-end with no `if cpu == ...` branches in user code. **Track A** (shipped) is the runtime-support SIMD bridge: six AVX2-accelerated intrinsics with scalar fallbacks; the Q16.16 path is byte-identical scalar-vs-SIMD at every input length, preserving the cross-arch bit-identity gate; it powers the mind-nerve score path at 9.3× the prior scalar floor. **Track B increment 1** (shipped, `mindc` v0.6.3) is the thesis-pure path: the compiler itself emits the MLIR `vector` dialect — new `std-surface` IR primitives `VecLoad`/`VecFma`/`VecReduceAdd` lower to `vector.load`/`vector.fma`/`vector.reduction <add>`, giving `dot_f32` a fused 8-lane SIMD loop with no C shim, no clang, no `-fPIC` (hence no Windows-MSVC packaging problem). Numerically within 1e-4 of an f64 oracle to 1M elements. Bootstrap fixed-point byte-identical (bootstrap uses no vector ops); default-build hot path byte-identical; the 2.80–17.10 µs frontend floor held through every addition (within the +7% bench-gate cap). Track A remains intact and additive.

mind-blas is the smallest surface that closes the dense-tensor performance gap without breaking the cross-arch bit-identity thesis. Spec: mind/docs/rfcs/0006-mind-blas.md. Track A + Track B increments 1, 2, 3a & 3b are in `mindc` v0.6.6 — including the native vectorised row-major matmul (`matmul_rmajor_f32_v`, the encode-GEMM latency lever): the Q16.16 vector dot (`dot_q16_v`, inc 2) and Q16.16 vector L1 (`dot_l1_q16_v`, inc 3a) are both byte-identical to their scalar oracles at every length — the cross-arch bit-identity gate (task #57) is closed for both the thesis-pure vector dot and vector L1 (single-x86-host scope; the full cross-hardware contract remains). Increment 3b (`@target` per-call substrate annotation, vectorised matmul, cross-module inlining) is the sequenced follow-on.

Track A: 6 __mind_blas_* intrinsics (dot/matmul + L1/L∞ + Q16.16), AVX2 + scalar fallback, Q16.16 byte-identical. Track B inc 1 (v0.6.3): native MLIR vector-dialect dot_f32 (VecLoad/VecFma/VecReduceAdd), 1e-4 vs f64 oracle to 1M, fixed-point byte-identical, +7% bench-gate cap held, default hot path unchanged. Track B inc 2 (v0.6.4): Q16.16 vector dot_q16_v + VecStore + f32 L1/L∞, #57 closed for the vector dot. Track B inc 3a (v0.6.5): Q16.16 vector L1 dot_l1_q16_v, byte-identical to the scalar oracle at all RFC lengths, #57 now closed for both vector dot and vector L1; default release binary + bootstrap byte-identical (bench-gate 0.0%). Inc 3b (v0.6.6): native vectorised row-major matmul_rmajor_f32_v (outer row scf.for + inlined dot_f32 reduction), same 1e-4 f64 contract as dot_f32_v, verified incl the (2,17) alignment-regression case; root-caused+fixed a vector-load 32B-natural-align GP-fault ({alignment=4}/vmovups) — the encode-GEMM latency lever. Default release binary + bootstrap byte-identical (bench-gate 0.0%, criterion µs unchanged). Deferred to §9.3c: @target per-call annotation, std.blas inlining, defensive dot_*_v alignment.

The toolchain self-hosts. Mindcraft is the MIND language's first-party source-quality toolchain — deterministic formatting, lint diagnostics, and static checks for .mind source — shipped as mindc fmt, mindc lint, and mindc check. All six phases landed in mindc v0.6.8: Phase 1 (MindcraftConfig / Mind.toml manifest types), Phase 2A (mindc fmt with --check / --diff / --stdin / --fix), Phase 3 (lint rule infrastructure, glob overrides, RuleRegistry), Phase 4 (5 named lint rules: q16_overflow, unused_import, naming_convention, shadowing, trailing_whitespace), Phase 5 (mindc check project driver — fmt + lint + typecheck — with VCS-aware filtering, JSON + LSP reporters), Phase 6 (--fix pipeline, CI integration, LSP reporter, GitHub Actions reusable workflow). MINDCRAFT-001 keystone: the pub keyword is now preserved through AST and formatter. Bench-gate +7% cap held across all phases: fmt vec.mind in 46 µs, mindc_mind/main.mind in 1.8 ms, full 117-file repo check in 23 ms.

The credibility ladder is complete: the language self-hosts, the compiler self-hosts, and the toolchain self-hosts. Few languages publicly reach all three rungs. mindc fmt output is byte-identical for a fixed (source, version) pair and idempotent; mindc lint emits a byte-identical diagnostic stream for a fixed (source, rule set, config). CI integration ships as a reusable GitHub Actions workflow at .github/workflows/mindcraft.yml. Spec: mind/docs/rfcs/0007-mindcraft.md.

Six phases shipped in mindc v0.6.8: Phase 1 MindcraftConfig manifest, Phase 2A mindc fmt (--check/--diff/--stdin/--fix), Phase 3 lint rule infrastructure + RuleRegistry, Phase 4 five named lint rules (q16_overflow / unused_import / naming_convention / shadowing / trailing_whitespace), Phase 5 mindc check project driver (VCS-aware, JSON + LSP reporters), Phase 6 --fix + CI + GitHub Actions workflow. Rung 3 of the credibility ladder closed.

The cargo-retirement track. RFC 0008 added mindc build (build orchestrator) and mindc test (test discovery + parallel runner). All seven phases shipped: Phase A — single-crate build (--target, --emit, --release, --out). Phase B — mindc test with the #[test] attribute and parallel runner. Phase C — workspace support with cross-crate topological sort and cycle detection. Phase D — external path dependencies with content-hash drift detection. Phase E — git dependencies with a Mind.lock two-file scheme and mandatory enforcement. Phase F — incremental compilation cache keyed on SHA-256(source + flags + dep hashes), with per-target isolation; warm rebuilds are 63x faster than cold. Phase G (KEYSTONE) — mindc build now produces the libmindc_mind.so artifact byte-identical to the v0.6.1 fixed-point oracle, driven entirely by the pure-MIND build orchestrator.

Cargo is no longer load-bearing for the pure-MIND compile loop. The Rust crate still hosts mindc itself and remains the cargo install mind distribution path until RFC 0010 lands a pure-MIND libMLIR FFI. Spec: mind/docs/rfcs/0008-mindc-build.md.

Credibility-ladder rung 3 (toolchain self-hosts) closed. Phase G keystone test verifies byte-identical output between mindc-orchestrated build and direct invocation. Phase F warm cache hit measured at 3 ms vs 188 ms cold (63x speedup). All seven phases tracked in mind/docs/rfcs/0008-mindc-build.md status table.

Three-tier memory model — all three tiers now live: stack (zero-cost, dropped at scope exit), region-interior (unrestricted aliasing within a bounded lifetime via region { } blocks, freed at region exit — Phase J-A shipped), and generation-checked region-exterior (GenRef for long-lived heap references whose deref returns 0 on a stale handle, converting use-after-free from UB into a checked None — Phase J-B shipped). C ABI: Phase A (extern "C" parser + callconv tagged enum) shipped; Phase B (SysV AMD64 struct passing) shipped; Phase C (Win64 calling convention) shipped. std.mlir (209 fns) and std.llvm (221 fns) — the libMLIR / libLLVM C API binding scaffolds — shipped as the Phase E + F foundation. G1 dropped the vestigial melior/inkwell deps. Phases G2/H (route mindc through the pure-MIND MLIR-text emitter, already byte-identical) + the full-independence keystone remain.

Memory model complete (region + GenRef, both with structured safety:: diagnostics through the type checker). C ABI A/B/C live. Escape + unchecked-deref checks flow through the same diagnostic surface as mindc check. Spec: RFC 0010 on GitHub.

Phase A: extern C parser + callconv tagged enum. Phase B: SysV AMD64 struct passing. Phase C: Win64 CC. Phase J-A: region { } region-interior tier. Phase J-B: GenRef generation-checked region-exterior tier. Phase E+F scaffolded via std.mlir + std.llvm. G1 dropped dead deps. G2/H/I (pure-MIND frontend default) remain — see the migration plan: the heavy Rust FFI the keystone assumed never existed; mindc emits MLIR text + shells to the C++ backend, and the pure-MIND compiler already mirrors the text emitter byte-identically.

Scheduler injection model: async execution is explicit via a &Scheduler argument passed to spawn sites — no keyword infection of fn signatures. Sender + Receiver algebra gives composable async values that chain without allocating futures on a hidden runtime heap. Tasks form a tree-shaped hierarchy where a parent always waits for all children before returning. ReplayScheduler is a first-class primitive that records and replays deterministic execution traces — the governance-substrate use case for auditable AI pipelines. Phase A (shipped): the Scheduler-injection API, Sender/Receiver composition, and the ReplayScheduler with a byte-stable FNV-1a trace_hash, all in pure MIND with synchronous execution. Cooperative cancellation only. Phases C/D (SingleThread + WorkStealing real concurrency) and real epoll/kqueue I/O remain.

Phase A live as std.async (the 12th gated stdlib module): explicit-Scheduler API, sender/receiver algebra, and a deterministic ReplayScheduler trace_hash. Real-thread schedulers + async I/O are Phase C/D. Spec: RFC 0011 on GitHub.

Spec-only draft. ReplayScheduler is the keystone primitive: deterministic trace replay is the foundation for governance-substrate audit pipelines. No implementation work scheduled until RFC 0008 Phase G settles and the community review period closes.

**Phase 10 (complete):** Shape-typed Tensor<dtype,[dims]> with compile-time shape checking; operator surface (@, .*, .T, reductions); #[deterministic] / #[target] / #[q16] annotations. **Phase 11 Tier 1 (v0.10.0, in progress):** Dense tensor literals (commit 9f807bd), elementwise operations (add/sub/mul/div in-function, committed), tensor-returning functions via bufferization preset (commit cb43c90). Determinism tiers: int/Q16 byte-identical cross-substrate (cross_substrate 12/12 verified); scalar f64/f32 run-to-run bit-identical on the strict path (verified on x86_64 (AVX2) + ARM64 (NEON), 2026-07-05); vector/SIMD-reduction f32 reproducible within-substrate (order-dependent, cross-substrate work deferred Phase 13.6). **Not yet:** Inter-function tensor-arg calls, deterministic intrinsics (zeros/ones/matmul/softmax/transpose/randn), sparse tensors, tensor-op fusion (Phase D).

Phase 10 surface (shape types, operators, annotations) preserved at +7% bench-gate cap; front-end byte-identical. Phase 11 Tier 1 execution live: dense literals compile + elementwise ops compute; tensor params/returns bufferize via MLIR one-shot-bufferize. Dense i64 matmul compiles but uses the scalar mind-blas path (not SIMD-vectorized for tensors yet — matmul vectorization is Phase 11 Tier 2). Spec: RFC 0012 on GitHub.

Phase 10 surface complete (v0.9.x). Phase 11 Tier 1 (v0.10.0): dense literals (9f807bd), elementwise ops, tensor-returning functions (cb43c90). Determinism: int/Q16 cross-substrate 12/12; scalar f64/f32 run-to-run bit-identical on the strict path; vector f32 within-substrate. Tier 2 (deterministic intrinsics) + Tier 3 (inter-fn tensor args) are Phase 11 roadmap.

The agent stdlib surface tiers — what agentic workloads expect to find in std.

• ✅ Tier 1 (shipped) — std.cli, std.io ANSI/TTY, std.string, std.tui, std.sha256
• 🔶 Tier 2 — std.tls: pure-MIND crypto/TLS primitives, RFC/NIST-KAT-verified — AES-128-GCM, SHA-256, HKDF, X25519, X.509 parse+verify, Keccak/SHA-3+SHAKE, RSA-PSS, ECDSA-P256, ML-KEM-768 (FIPS 203 PQC), and the TLS 1.3 key schedule / record layer / Finished / handshake crypto replayed against the RFC 8448 trace. Honest scope: a verified primitive library, not a connectable TLS client yet — the socket-driven handshake state machine and certificate-chain path validation remain open
• 🔶 Tier 3 — std.http: HPACK (RFC 7541, decode-only) + HTTP/2 framing (RFC 9113) primitives verified; a working HTTP client/server and std.http.sse remain open
• ⏳ Tier 4 — async I/O (RFC 0011 Phases B/C/D)
• ⏳ Tier 5 — std.mcp client + server
• ⏳ Tier 6 — mindcraft-agent integration sprint
• RFC 0013 on GitHub →

Tier 1 behind std-surface (mindc 0.7.x). Tier 2/3 crypto, TLS 1.3, and HTTP/2 primitives are RFC/NIST-KAT-verified as a library (correctness-first, not speed-optimized); the socket-driven TLS client state machine is the longest remaining pole.

Compile-time provenance attestation as a first-class artifact. Same source → byte-identical IR + matching evidence chains across substrates.

• ✅ Phase A — inert MAP epilogue carrying determinism / substrate / toolchain / trace_hash / parent
• ✅ Phase B — verify_evidence_chain core (structured EvidenceReport)
• ✅ GAP-1 (load-bearing) — trace_hash anchored on canonical mic@3 binary, not mic@1 text or v2 forms (re-anchored 2026-05-31)
• ⏳ Phase C — wire into the default mindc build emit path
• ⏳ Phase D — cross-artifact ref-by-hash for RFC 0017 chains
• Emit: mindc --emit-evidence · RFC 0016 on GitHub →

Phase A: inert emission. Phase B: verifier core. GAP-1: trace_hash anchored on canonical mic@3 (re-anchored 2026-05-31, prior mic@1 text was lossy for function bodies). Phase C/D pending.

One IR data shape (IRModule), two canonical serialisations: mic@1 text + mic@3 binary. Round-trip equivalent. Closes the two-IR divergence between evidence machinery (built on v2 Graph) and the compiled artifact (IRModule).

• ✅ Step 1 — mic@3 binary IRModule codec (magic MIC3, all 37 Instr variants, additive)
• ✅ Step 2 — evidence MAP epilogue on mic@3 via 0x4D sentinel
• ✅ Step 3 — mindc --emit-mic3 / --emit-evidence CLI
• ⏳ Step 4 — mindc verify CLI (entangles RFC 0017 SMT)
• ⏳ Step 5 — demote mic@2.x to mind-model@2 (model-exchange, not IR contract)
• ⏳ Step 6 — oracle + CI gate enforcing both serialisations
• RFC 0021 on GitHub →

Steps 1–3 shipped at mind/src/ir/compact/v3/. Steps 4–6 in flight.

Target: ultra-low latency runtime with streaming tensor executor, Q16.16 fixed-point arithmetic, and safety-critical mode with NaN/overflow/bounds checking for medical and BCI workloads.

Safety-critical BCI execution is a planned capability of the commercial mind-runtime. Architecture is defined; implementation has not shipped.

BCI runtime (streaming executor, safety-critical mode, signal processing primitives) is on the mind-runtime commercial roadmap. No public release date set.

Target: distributed training with TCP transport, NCCL/Gloo backends, RingAllReduce, pipeline parallelism, and fault tolerance. Planned for the commercial mind-runtime.

Distributed execution is a planned capability of the commercial mind-runtime. Architecture is defined; no production implementation has shipped.

Distributed training (data/model/pipeline parallelism, elastic scaling) is on the mind-runtime commercial roadmap. No public release date set.

Target: model serving with native + ONNX export, HTTP/gRPC inference server, dynamic batching, Prometheus metrics, and Kubernetes health checks. Planned for the commercial mind-runtime.

Deployment and serving infrastructure is a planned capability of the commercial mind-runtime. No production implementation has shipped.

Model serving infrastructure (export, inference server, metrics, health monitoring) is on the mind-runtime commercial roadmap.

Spec aligned with implementations. 20 IR instructions, 47 E-codes, 1e-5 numerical tolerance. 175+ compiler tests, 136 runtime tests, all passing.

Compiler and runtime implementations fully match spec. Conformance test suite complete.

All spec files aligned: ir.md, autodiff.md, ffi.md, runtime.md, types.md, errors.md. CHANGELOG.md present in all repos.

Specification-grade documentation across compiler, runtime, and spec repos.

5 MLIR dialects (arith, tensor, linalg, func, scf). Tested with LLVM 21. 7 FFI functions, 3 enums, 2 opaque types. As of v0.7.1, the std-surface feature is promoted to the shipped default: ten desugaring "bricks" lower high-level constructs down to the same deterministic backend — integer/literal match, enum-discriminant match, Option/payload-binding match, string literals, struct field-write, nested-struct + borrow field access, method-as-field accessors (s.len()), and method-with-args UFCS (v.push(x) → vec_push(v, x), with unresolved calls failing loud rather than miscompiling). Cross-substrate byte-identity is preserved for the keystone (7/7 keystones byte-identical across its targets) and the --no-default-features low-level subset; the default-build high-level surface executes on every shipped binary.

Full compiler workflow with CPU backend. In v0.7.1 the std-surface feature is promoted to the shipped default, so the high-level surface executes on every shipped binary. Cross-substrate byte-identity is preserved for the keystone (7/7 keystones byte-identical across its targets) and the --no-default-features low-level subset; the default-build high-level surface executes on every shipped binary. Unpromoted constructs (by-value tuple/aggregate returns, region {}) are re-gated behind std-surface-experimental and fail loud by default. --no-default-features restores the low-level-only subset. GPU and multi-vendor accelerator backends ship in the commercial mind-runtime (available under license); the open compiler ships the deterministic CPU backend.